Search Results - "Application-specific instruction-set processors"

Lightweight ASIP Design for Lattice-Based Post-quantum Cryptography Algorithms.

Authors: Akçay, Latif Yalçın, Berna Örs

Source: Arabian Journal for Science & Engineering (Springer Science & Business Media B.V. ). Jan2025, Vol. 50 Issue 2, p835-849. 15p.

Subjects: Application-specific instruction-set processors, Mathematics software, Computer software, Information design, Cryptography

Speeding up the Discrete Cosine Transform Through Custom Operations and Fixed-Point Arithmetic.

Authors: Akçay, Latif Engin, Mustafa Alptekin

Source: Journal of Innovative Science & Engineering (JISE); 2025, Vol. 9 Issue 2, p268-278, 11p

High-Performance Computing in the Residue Number System.

Authors: Nikolaychuk, Y. Pitukh, I.

Source: Cybernetics & Systems Analysis; Jul2025, Vol. 61 Issue 4, p685-696, 12p

Broadcom Stock Rises On New Apple Supply Deal.

Authors: SEITZ, PATRICK (AUTHOR)

Source: Investors Business Daily. 7/6/2026, pN.PAG-N.PAG. 1p.

Subjects: Apple Inc., Contracts, Semiconductor industry, Application-specific instruction-set processors, Apple computers, Household electronics industry, Stock prices

Broadcom Stock Rises On Meta AI Chip Partnership.

Authors: SEITZ, PATRICK (AUTHOR)

Source: Investors Business Daily. 4/15/2026, pN.PAG-N.PAG. 1p.

Subjects: Stock prices, Meta Platforms Inc., Facebook (Web resource), High technology industries, Application-specific instruction-set processors, Business partnerships

Compilation and Worst-Case Reaction Time Analysis for Multithreaded Esterel Processing.

Authors: Boldt, Marian Traulsen, Claus von Hanxleden, Reinhard

Source: EURASIP Journal on Embedded Systems. 1/7/2009, p1-21. 21p. 10 Diagrams, 3 Charts, 1 Graph.

Subjects: Application-specific instruction-set processors, Synchronous data transmission systems, Compilers (Computer programs), Digital communications, Language & education, Interlanguage (Language learning)

Impact of Process Variations on Speedup and Maximum Achievable Frequency of Extensible Processors.

Authors: KAMAL, MEHDI AFZALI-KUSHA, ALI SAFARI, SAEED et al.

Source: ACM Journal on Emerging Technologies in Computing Systems; Apr2014, Vol. 10 Issue 3, p19:1-19:25, 25p

Automatic generation of compiler backends.

Authors: Brandner, Florian Pavlu, Viktor Krall, Andreas

Source: Software: Practice & Experience; Feb2013, Vol. 43 Issue 2, p207-240, 34p

Hardware Accelerators Targeting a Novel Group Based Packet Classification Algorithm.

Authors: Ahmed, O. Areibi, S. Grewal, G.

Source: International Journal of Reconfigurable Computing; 2013, p1-33, 33p

Implementation of a reconfigurable ASIP for high throughput low power DFT/DCT/FIR engine.

Authors: Hassan, Hanan M. Mohammed, Karim Shalash, Ahmed F.

Source: EURASIP Journal on Embedded Systems; Feb2012, Vol. 2012 Issue 1, p1-18, 18p

On the Feasibility and Limitations of Just-in-Time Instruction Set Extension for FPGA-Based Reconfigurable Processors.

Authors: Grad, Mariusz Plessl, Christian

Source: International Journal of Reconfigurable Computing; 2012, p1-21, 21p

Network Anomaly Detection Based on Wavelet Analysis.

Authors: Wei Lu Ghorbani, Ali A.

Source: EURASIP Journal on Advances in Signal Processing; 2009, Special section p1-16, 16p, 2 Diagrams, 14 Charts, 4 Graphs

Prefabrication and Postfabrication Architecture Exploration for Partially Reconfigurable VLIW Processors.

Authors: Chattopadhyay, A. Ishebabi, H. Chen, X. et al.

Source: ACM Transactions on Embedded Computing Systems; Jul2008, Vol. 7 Issue 4, p40-40:31, 31p, 8 Diagrams, 13 Charts, 1 Graph

RC4-AccSuite: A Hardware Acceleration Suite for RC4-Like Stream Ciphers.

Authors: Khalid, Ayesha Paul, Goutam Chattopadhyay, Anupam

Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. Mar2017, Vol. 25 Issue 3, p1072-1084. 13p.

Subjects: Application-specific instruction-set processors, Stream ciphers, Application-specific integrated circuits

Automatic instruction-set architecture synthesis for VLIW processor cores in the ASAM project.

Authors: Jordans, Roel Jóźwiak, Lech Corporaal, Henk et al.

Source: Microprocessors & Microsystems. Jun2017, Vol. 51, p114-133. 20p.

Subjects: Application-specific instruction-set processors, Microprocessors, Multicore processors, Problem solving, Mathematical combinations

Fine-Grained Checkpoint Recovery for Application-Specific Instruction-Set Processors.

Authors: Li, Tuo Shafique, Muhammad Ambrose, Jude Angelo et al.

Source: IEEE Transactions on Computers. Apr2017, Vol. 66 Issue 4, p647-660. 14p.

Subjects: Application-specific instruction-set processors, Fault tolerance (Engineering), Computer software, Computer architecture, Embedded computer systems

Compact and low‐power ASIP design for lightweight PUF‐based authentication protocols.

Authors: Aysu, Aydin Gulcan, Ege Moriyama, Daisuke et al.

Source: IET Information Security (Wiley-Blackwell). Sep2016, Vol. 10 Issue 5, p232-241. 10p.

Subjects: Application-specific instruction-set processors, Application-specific integrated circuits, Instruction set processors, Logic design, Physical mobility

MOSAIC: Maximizing ResOurce Sharing in Behavioral Application SpecIfic ProCessors.

Authors: Si, Qilin Carrion Schafer, Benjamin

Source: Microprocessors & Microsystems. Apr2024, Vol. 106, pN.PAG-N.PAG. 1p.

Subjects: Application-specific instruction-set processors

A Dynamically Reconfigurable Multi-ASIP Architecture for Multistandard and Multimode Turbo Decoding.

Authors: Lapotre, Vianney Gogniat, Guy Diguet, Jean-Philippe et al.

Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. Jan2016, Vol. 24 Issue 1, p383-387. 5p.

Subjects: Application-specific instruction-set processors, Turbo codes, Wireless communications, Multiprocessors, Decoding algorithms, Channel coding

System-level synthesis of multi-ASIP platforms using an uncertainty model.

Authors: Micconi, Laura Madsen, Jan Pop, Paul

Source: Integration: The VLSI Journal. Sep2015, Vol. 51, p118-138. 21p.

Subjects: Systems theory, Application-specific instruction-set processors, Uncertainty (Information theory), Evolutionary algorithms, Electrical engineering