Search Results - "CMOS memory circuits"

Soft-error mitigation by means of decoupled transactional memory threads.

Authors: Sánchez, Daniel Cebrián, Juan García, José et al.

Source: Distributed Computing. Apr2015, Vol. 28 Issue 2, p75-90. 16p.

Subjects: CMOS memory circuits, Fault-tolerant computing, Soft errors, Cache memory, Computer simulation

A Novel Low Noise High Gain CMOS Instrumentation Amplifier for Biomedical Applications.

Authors: Goel, Akshay Singh, Gurmohan

Source: International Journal of Electrical & Computer Engineering (2088-8708). Aug2013, Vol. 3 Issue 4, p516-523. 8p.

Subjects: CMOS memory circuits, Biomedical signal processing, Instrumentation amplifier design & construction, Application software, Transistor noise, Electric network topology, Computer simulation

A Low Power 32 Bit CMOS ROM Using a Novel ATD Circuit.

Authors: Kukrety, Sidhant Singh, Gurmohan Sulochana, Vemu

Source: International Journal of Electrical & Computer Engineering (2088-8708). Aug2013, Vol. 3 Issue 4, p509-515. 7p.

Subjects: Read-only memory, CMOS memory circuits, Electric potential, Decoders (Electronics), Signal processing, Low voltage systems, Comparative studies

Small-area and compact CMOS emulator circuit for CMOS/nanoscale memristor co-design.

Authors: Shin, SangHak Choi, Jun-Myung Cho, Seongik et al.

Source: Nanoscale Research Letters; Dec2013, Vol. 8 Issue 1, p1-7, 7p

X-SRAM: Enabling In-Memory Boolean Computations in CMOS Static Random Access Memories.

Authors: Agrawal, Amogh Jaiswal, Akhilesh Lee, Chankyu et al.

Source: IEEE Transactions on Circuits & Systems. Part I: Regular Papers. Dec2018, Vol. 65 Issue 12, p4219-4232. 14p.

Subjects: Boolean algebra, CMOS memory circuits, Random access memory, Metal oxide semiconductor field-effect transistor testing, Artificial intelligence

On the Implementation of Computation-in-Memory Parallel Adder.

Authors: Du Nguyen, Hoang Anh Xie, Lei Taouil, Mottaqiallah et al.

Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. Aug2017, Vol. 25 Issue 8, p2206-2219. 14p.

Subjects: CMOS memory circuits, Logic circuits, Computer integrated manufacturing systems, Implication (Logic), Adders (Digital electronics)

A 0.55-V, 28-ppm/°C, 83-nW CMOS Sub-BGR With UltraLow Power Curvature Compensation.

Authors: Liu, Lianxi Mu, Junchao Zhu, Zhangming

Source: IEEE Transactions on Circuits & Systems. Part I: Regular Papers. Jan2018, Vol. 65 Issue 1, p95-106. 12p.

Subjects: CMOS memory circuits, Threshold voltage, Capacitors

A $4\times 5$ -Gb/s 1.12- \mu \text{s} Locking Time Reference-Less Receiver With Asynchronous Sampling-Based Frequency Acquisition and Clock Shared Subchannels.

Authors: Song, Junyoung Hwang, Sewook Kim, Chulwoo

Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. Aug2016, Vol. 24 Issue 8, p2768-2777. 10p.

Subjects: CMOS memory circuits, Clock & data recovery circuits, Bandwidths, MOS memory circuits, Integrated memory circuits

Josephson-CMOS Hybrid Memory With Nanocryotrons.

Authors: Tanaka, Masamitsu Suzuki, Masato Konno, Gen et al.

Source: IEEE Transactions on Applied Superconductivity. Jun2017 Part 1, Vol. 27 Issue 4, Part 1, p1-4. 4p.

Subjects: CMOS memory circuits, Cryotrons, Dynamic random access memory, Quantum logic

An integrated Ka-band VCO and divide-by-4 frequency divider with 30.2% tuning range in 90-nm CMOS.

Authors: Alsuraisry, Hamed Cheng, Jen‐Hao Li, Wei‐Tsung et al.

Source: Microwave & Optical Technology Letters. Jun2017, Vol. 59 Issue 6, p1306-1309. 5p.

Subjects: Voltage-controlled oscillators, CMOS memory circuits, Complementary metal oxide semiconductors, Frequency dividers, Bandwidths

Self-Selection RRAM Cell With Sub- \mu \textA Switching Current and Robust Reliability Fabricated by High- $K$ /Metal Gate CMOS Compatible Technology.

Authors: Huang, Peng Chen, Sijie Zhao, Yudi et al.

Source: IEEE Transactions on Electron Devices. Nov2016, Vol. 63 Issue 11, p4295-4301. 7p.

Subjects: CMOS memory circuits, Reliability in engineering, Random access memory, Switching circuits, Interfaces (Physical sciences)

Frequency-Translational Quadrature-Hybrid Receivers for Very-Low-Noise, Frequency-Agile, Scalable Inter-Band Carrier Aggregation.

Authors: Zhu, Jianxun Kinget, Peter R.

Source: IEEE Journal of Solid-State Circuits. Dec2016, Vol. 51 Issue 12, p3137-3151. 15p.

Subjects: CMOS memory circuits, Quadrature amplitude modulation

Characterization of Single-Event Transient Pulse Quenching among Dummy Gate Isolated Logic Nodes in 65 nm Twin-Well and Triple-Well CMOS Technologies.

Authors: Jianjun, Chen Shuming, Chen Yaqing, Chi et al.

Source: IEEE Transactions on Nuclear Science. Oct2015 Part 2, Vol. 62 Issue 5b, p2302-2309. 8p.

Subjects: Logic circuits, CMOS memory circuits, Pulse modulation, Charge sharing (Digital electronics), Transient analysis

An Innovations Approach to Viterbi Decoding of Convolutional Codes.

Authors: Tajima, Masato¹, masatotjm@kind.ocn.ne.jp

Source: IEEE Transactions on Information Theory; May2019, Vol. 65 Issue 5, p2704-2722, 19p

Unipolar n-Type Conduction in Black Phosphorus Induced by Atomic Layer Deposited MgO.

Authors: Wang, Lin Liao, Wugang Xu, Shengqiang et al.

Source: IEEE Electron Device Letters; Mar2019, Vol. 40 Issue 3, p471-474, 4p

Bio-inspired fault detection circuits based on synapse and spiking neuron models.

Authors: Liu, Junxiu Huang, Yongchuang Luo, Yuling et al.

Source: Neurocomputing; Feb2019, Vol. 331, p473-482, 10p

Gain Error Calibrations for Two-Step ADCs: Optimizations Either in Accuracy or Chip Area.

Authors: Wang, Guan Cheng Zhu, Yan Chan, Chi-Hang et al.

Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems; Nov2018, Vol. 26 Issue 11, p2279-2289, 11p

Built-In Self-Test, Diagnosis, and Repair of MultiMode Power Switches.

Authors: Wang, Ran Zhang, Zhaobo Kavousianos, Xrysovalantis et al.

Source: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems. Aug2014, Vol. 33 Issue 8, p1231-1244. 14p.

Subjects: Complementary metal oxide semiconductors, CMOS memory circuits, Metal oxide semiconductors, Energy consumption research, Electric potential

Performance improvement and functionalization of an electrode array for retinal prosthesis by iridium oxide coating and introduction of smart-wiring technology using CMOS microchips.

Authors: Noda, Toshihiko Sasagawa, Kiyotaka Tokuda, Takashi et al.

Source: Sensors & Actuators A: Physical. May2014, Vol. 211, p27-37. 11p.

Subjects: Performance evaluation, CMOS memory circuits, Integrated circuits, Iridium oxide films, Miniature electronic equipment, Electric wiring

A 10/24-GHz CMOS/IPD Monopulse Receiver for Angle-Discrimination Radars.

Authors: Wang, Sen Lin, Wen-Jie

Source: IEEE Transactions on Circuits & Systems. Part I: Regular Papers. Oct2014, Vol. 61 Issue 10, p2999-3006. 8p.

Subjects: CMOS memory circuits, Monopulse radar, Line receivers (Integrated circuits), Broadband amplifiers, Integrated circuits