Search Results - "Concurrent error detection"

A systematic survey on automated concurrency bug detection, exposing, avoidance, and fixing techniques.

Authors: Fu, Haojie Wang, Zan Chen, Xiang et al.

Source: Software Quality Journal; Sep2018, Vol. 26 Issue 3, p855-889, 35p

Sum Codes with Efficient Detection of Twofold Errors for Organization of Concurrent Error-Detection Systems of Logical Devices.

Authors: Dmitriev, V. V. Efanov, D. V. Sapozhnikov, V. V. et al.

Source: Automation & Remote Control. Apr2018, Vol. 79 Issue 4, p665-678. 14p.

Subjects: Concurrent error detection, Combinational circuits, Data transmission systems, Coding theory, Computational complexity

New structures of the concurrent error detection systems for logic circuits.

Authors: Sapozhnikov, V. Sapozhnikov, Vl. Efanov, D. et al.

Source: Automation & Remote Control. Feb2017, Vol. 78 Issue 2, p300-312. 13p.

Subjects: Concurrent error detection, Logic circuits, Mathematical sequences, Mathematical analysis, Electronic information resources

Conditions for detecting a logical element fault in a combination device under concurrent checking based on Berger's code.

Authors: Efanov, D. Sapozhnikov, V. Sapozhnikov, Vl.

Source: Automation & Remote Control; May2017, Vol. 78 Issue 5, p891-901, 11p

Invariance-Based Concurrent Error Detection for Advanced Encryption Standard.

Authors: Xiaofei Guo Karri, Ramesh

Source: DAC: Annual ACM/IEEE Design Automation Conference; Jun2012, p573-578, 6p

A study and toolkit of CHECK-THEN-ACT idioms of Java concurrent collections.

Authors: Lin, Yu Dig, Danny

Source: Software Testing: Verification & Reliability. Jun2015, Vol. 25 Issue 4, p397-425. 29p.

Subjects: Java programming language, Concurrent error detection, Threads (Computer programs), Idioms, Computer programmers

A Comprehensive and Comparative Study on Online Testability for Reversible Logic.

Authors: Gaur, Hari Mohan Singh, Ashutosh Kumar Ghanekar, Umesh

Source: Pertanika Journal of Science & Technology; Jul2016, Vol. 24 Issue 2, p245-271, 27p

Are concurrency coverage metrics effective for testing: a comprehensive empirical investigation.

Authors: Hong, Shin Staats, Matt Ahn, Jaemin et al.

Source: Software Testing: Verification & Reliability; Jun2015, Vol. 25 Issue 4, p334-370, 37p

The Self-Checking Concurrent Error-Detection Systems Synthesis Based on the Boolean Complement to the Bose-Lin Codes with the Modulo Value M = 4.

Authors: Efanov, D. V. Sapozhnikov, V. V. Sapozhnikov, Vl. V.

Source: Èlektronnoe Modelirovanie; 2021, Vol. 43 Issue 1, p28-45, 18p

Thesis Overview: Software for Multi-Core Processor-Based Architectures. Automatic Detection of Concurrency Errors.

Authors: FRATI, Fernando Emmanuel¹

Source: Journal of Computer Science & Technology (JCS&T); Nov2015, Vol. 15 Issue 2, p154-156, 3p

On Probability of Detection Lossless Concurrent Error Detection Based on Implications.

Authors: Wang, Chih-Hao Hsieh, Tong-Yu

Source: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems. May2018, Vol. 37 Issue 5, p1090-1103. 14p.

Subjects: Concurrent error detection, Reliability in engineering, Integrated circuits, Fault tolerance (Engineering), Computer programming

Hardware Support for Concurrent Detection of Multiple Concurrency Bugs on Fused CPU-GPU Architectures.

Authors: Zhang, Weihua Yu, Shiqiang Wang, Haojun et al.

Source: IEEE Transactions on Computers. Oct2016, Vol. 65 Issue 10, p3083-3095. 13p.

Subjects: Computer input-output equipment, Concurrent error detection, Central processing units, Graphics processing units, Computer architecture, Data analysis

Design of a hybrid non-volatile SRAM cell for concurrent SEU detection and correction.

Authors: Junsangsri, Pilin Han, Jie Lombardi, Fabrizio

Source: Integration: The VLSI Journal. Jan2016, Vol. 52, p156-167. 12p.

Subjects: Nonvolatile random-access memory, Concurrent error detection, Transistors, Computer storage devices, Hybrid power systems

HistLock+: Precise Memory Access Maintenance Without Lockset Comparison for Complete Hybrid Data Race Detection.

Authors: Yang, Jialin Jiang, Bo Chan, W. K.

Source: IEEE Transactions on Reliability; Sep2018, Vol. 67 Issue 3, p786-801, 16p

Model checking of concurrent programs with static analysis of field accesses.

Authors: Parízek, Pavel Lhoták, Ondřej

Source: Science of Computer Programming. Feb2015 Part 4, Vol. 98, p735-763. 29p.

Subjects: Concurrent error detection, Threads (Computer programs), Java programming language, Computer software execution, Information technology, Data reduction

Attack tolerant cryptographic hardware design by combining error correction and uniform switching activity.

Authors: Mathew, Jimson Mohanty, Saraju P. Banerjee, Shibaji et al.

Source: Computers & Electrical Engineering. May2013, Vol. 39 Issue 4, p1077-1087. 11p.

Subjects: Concurrent error detection, Cryptography, Cyberterrorism, Switching circuits, Fault tolerance (Engineering), Algorithms, Signal processing

Reliable Concurrent Error Detection Architectures for Extended Euclidean-Based Division Over GF(2^m).

Authors: Mozaffari-Kermani, Mehran Azarderakhsh, Reza Lee, Chiou-Yng et al.

Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. May2014, Vol. 22 Issue 5, p995-1003. 9p.

Subjects: Data encryption, Concurrent error detection, Algorithms, Digital signatures, Euclidean distance, Elliptic curve cryptography, Fault tolerance (Engineering)

Low-Cost Concurrent Error Detection for Floating-Point Unit (FPU) Controllers.

Authors: Maniatakos, Michail Kudva, Prabhakar Fleischer, Bruce M. et al.

Source: IEEE Transactions on Computers. Jul2013, Vol. 62 Issue 7, p1376-1388. 13p.

Subjects: Concurrent error detection, Floating-point arithmetic, IEEE Computer Society, Computer input-output equipment, Microprocessors, Data analysis, Transient analysis

Recomputing with Permuted Operands: A Concurrent Error Detection Approach.

Authors: Guo, Xiaofei Karri, Ramesh

Source: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems. Oct2013, Vol. 32 Issue 10, p1595-1608. 14p.

Subjects: Concurrent error detection, Reliability in engineering, Field programmable gate arrays, Block ciphers, Integrated circuits, Data encryption, Computer architecture

A Comparison of Dual Modular Redundancy and Concurrent Error Detection in Finite Impulse Response Filters Implemented in SRAM-Based FPGAs Through Fault Injection.

Authors: Aranda, Luis Alberto Reviriego, Pedro Maestro, Juan Antonio

Source: IEEE Transactions on Circuits & Systems. Part II: Express Briefs; Mar2018, Vol. 65 Issue 3, p376-380, 5p