Search Results - "VHDL (Computer hardware description language)"

DESIGN OF AN FPGA BASED MULTI-FEATURE SPECTRUM ANALYZER.

Authors: Yusuf, A. Dibal, P. Y. Ngene, C. U. et al.

Source: Nigerian Journal of Technology; Mar2026, Vol. 45 Issue 1, p139-154, 16p

PyHLS: Intermediate Representation for Versatile High-Level Synthesis.

Authors: Cieszewski, Radoslaw¹ radoslaw.cieszewski@pw.edu.pl

Source: International Journal of Electronics & Telecommunications. 2025, Vol. 71 Issue 4, p1-7. 9p.

High-speed field-programmable gate array implementation for mmWave orthogonal frequency-division multiplexing transmitters: design and evaluation.

Authors: Puntsri, Kidsanapong Bunsri, Bussakorn Suthisopapan, Puripong

Source: International Journal of Electrical & Computer Engineering (2088-8708); Aug2025, Vol. 15 Issue 4, p3813-3823, 11p

DESIGN OF IMPROVED STRUCTURES FOR MULTI-BIT DATA ADDITION DEVICES IN BINARY CODES OF THE RADEMACHER THEORETICAL-NUMERICAL BASIS.

Authors: Nykolaychuk, Yaroslav Pitukh, Igor Hryha, Volodymyr

Source: Eastern-European Journal of Enterprise Technologies; 2025, Vol. 6 Issue 2(138), p72-83, 12p

The Spike Processing Unit (SPU): An IIR Filter Approach to Hardware-Efficient Spiking Neurons.

Authors: de Araújo, Hugo Puertas¹

Source: Chips; Jun2026, Vol. 5 Issue 2, p11, 25p

Hybrid LUT-CORDIC architecture on FPGA for efficient and accurate trigonometric computation in robot manipulators.

Authors: Augoestien, Nia Gella Istiyanto, Jazi Eko Ashari, Ahmad et al.

Source: International Journal of Robotics & Automation (Institute of Advanced Engineering & Science); Jun2026, Vol. 15 Issue 2, p377-387, 11p

Premiers retours d'expérience de Travaux Pratiques FPGA en distanciel. (French)

Authors: Canu, Michael Bressan, Michael Talbert, Thierry et al.

Source: J3eA (1638-5705); 2025, Vol. 24, p1-11, 11p

Implementation of NonLinear Controller with Anti-Windup on Xilinx FPGA.

Authors: Ahmed, Samet Yahia, Kourd Dimitri, Lefebvre

Source: Arabian Journal for Science & Engineering (Springer Science & Business Media B.V. ). Sep2024, Vol. 49 Issue 9, p13005-13024. 20p.

Subjects: VHDL (Computer hardware description language), Particle swarm optimization, Fuzzy algorithms, Membership functions (Fuzzy logic), Fuzzy logic, Adaptive fuzzy control

Generic FPGA Pre-Processing Image Library for Industrial Vision Systems.

Authors: Ferreira, Diogo Moutinho, Filipe Matos-Carvalho, João P. et al.

Source: Sensors (14248220). Sep2024, Vol. 24 Issue 18, p6101. 17p.

Introducing High-Level Synthesis in Computer Engineering Curricula.

Authors: Hassan, Amr Dallal, Ahmed Zaghloul, Mohamed A. S. et al.

Source: Proceedings of the ASEE Annual Conference & Exposition. 2024, p1-11. 11p.

Implementation of Digital System Using CPLD/FPGA and Analysis Using XILINX and ISIM Simulation Software.

Authors: AVWORO, O. L.¹, leslieavworo@gmail.com

Source: FUPRE Journal of Scientific & Industrial Research; 2025, Vol. 9 Issue 4, p176-189, 14p

Design and Implementation of Filter Bank Multicarrier Transceiver for 5G Waveforms.

Authors: Kabilamani, Pandiyan Gomathy, Chidambaram

Source: Wireless Personal Communications; Oct2025, Vol. 144 Issue 3/4, p463-479, 17p

VHDL implementation of circular shifting‐partial transmit sequence in MIMO OFDM systems.

Authors: Abdel‐Atty, Heba M. Hassaneen, Saly S. Soliman, Heba Y.

Source: International Journal of Communication Systems. Feb2023, Vol. 36 Issue 3, p1-22. 22p.

Subjects: VHDL (Computer hardware description language), MIMO systems, Field programmable gate arrays

Improvements in space radiation-tolerant FPGA implementation of land surface temperature-split window algorithm.

Authors: El Makhloufi, Assaad Chekroun, Nisrine Tagmouti, Noha et al.

Source: International Journal of Electrical & Computer Engineering (2088-8708). Oct2021, Vol. 11 Issue 5, p3844-3854. 11p.

Subjects: VHDL (Computer hardware description language), Field programmable gate arrays, Land surface temperature, Remote sensing

INSERTION SEMANTICS OF VHDL AS ELECTRONIC DESIGN LANGUGE.

Authors: Letychevskyi, O. O. Odarushchenko, O. M. Peschanenko, V. S. et al.

Source: Cybernetics & Systems Analysis / Kibernetyka ta Systemnyi Analiz. 2022, Vol. 58 Issue 2, p289-298. 10p.

Implementation of IEEE 802.16e Standard on Xilinx ZC706: A C-RAN Prototype.

Authors: Joodaki, Sadaf Fardad, Mohammad Alghasi, Saeid et al.

Source: Wireless Personal Communications. 2021, Vol. 116 Issue 3, p2187-2204. 18p.

Subjects: Radio access networks, VHDL (Computer hardware description language), Transmitters (Communication), Field programmable gate arrays, Prototypes

Development of Library Components for Floating Point Processor.

Authors: SHARMA, SUBHASH KUMAR DUBEY, SHRI PRAKASH MISHRA, ANIL KUMAR

Source: Journal of Ultra Scientist of Physical Sciences - Section A (Mathematics). 2021, Vol. 33 Issue 4, p42-50. 9p.

Camera Link HS: The Path to 50 Gbps and Beyond: Inexpensive IP core speeds development and implementation of CLHS for camera and frame grabber manufacturers.

Authors: McCurrach, Bob Miethig, Mike Schwarzbauer, Martin

Source: Vision Systems Design. Jan/Feb2022, Vol. 27 Issue 1, p24-28. 3p.

Subjects: VHDL (Computer hardware description language), Cameras

Fundamentos da lógica digital com VHDL

Authors: Omar Iván Trejos Buriticá Jovanny Bedoya Guapacha Juan David Hincapié Zea

Resource Type: eBook.

Subjects: VHDL (Computer hardware description language), Logic design--Data processing, Logic circuits--Design and construction--Data processing

Categories: COMPUTERS / Logic Design, COMPUTERS / Computer Architecture, TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic

Simulating the effects of logic faults in implementation-level VITAL-compliant models.

Authors: Tuzov, Ilya de Andrés, David Ruiz, Juan-Carlos

Source: Computing; Feb2019, Vol. 101 Issue 2, p77-96, 20p