Search Results - "Wafer level packaging"

Where the U.S.’s Chip Strategy Is Still Falling Short.

Authors: Shih, Willy C. Lin, P. J.

Source: Harvard Business Review Digital Articles. 4/28/2026, p1-8. 8p.

一种 K 波段晶圆级封装器件化 R 组件设计.

Alternate Title: Design of a K-band Wafer-level Package Rx Module.

Authors: 朱贵德 罗 鑫 王军会 et al.

Source: Telecommunication Engineering. 6/28/2025, Vol. 65 Issue 6, p980-985. 6p.

Epoxy molding compound encapsulation process in IC packaging: a review at wafer and component levels.

Authors: Othman, Ainnur Hanim Aziz, Mohd Sharizal Abdul Ishak, Mohammad Hafifi Hafiz et al.

Source: International Journal of Advanced Manufacturing Technology. Feb2026, Vol. 142 Issue 7/8, p3281-3305. 25p.

Subjects: Wafer level packaging, Electronic packaging, Compression molding, Epoxy resins, Reliability in engineering, Hard materials

Effects of die aspect ratio on mold flow and structural behaviour in wafer-level encapsulation process.

Authors: Othman, Ainnur Hanim Qing, Ooi Teng Abdul Aziz, Mohd Sharizal et al.

Source: International Journal of Advanced Manufacturing Technology. Jun2026, p1-18. 18p.

Development of bifurcation prediction and process emulation for warpage prediction in fan-out wafer level packaging based on material equivalence.

Authors: Chen, Kuo-Shen Lee, Yu-Chin Chen, Chia-Yu et al.

Source: International Journal of Advanced Manufacturing Technology. Jun2026, p1-19. 19p.

Laser ablation and stealth dicing of full-thickness silicon wafer.

Authors: Son, Yeongil Shin, Joonghan

Source: International Journal of Advanced Manufacturing Technology. Mar2025, Vol. 137 Issue 3, p1599-1614. 16p.

Subjects: Laser ablation, Wafer level packaging, Silicon wafers, Surface defects, Laser pulses

DEVICE PACKAGING 2026.

Source: Advancing Microelectronics. 2026, Vol. 53 Issue 1, p28-48. 19p.

Subjects: Wafer level packaging, Optical interconnects, Electronic packaging, Temperature control equipment

Flow-field-driven control of coating uniformity in fowlp soft-bake chambers.

Authors: Lee, Junyoung Hong, Joopyo Kim, Seungmo

Source: Journal of Mechanical Science & Technology. Dec2025, Vol. 39 Issue 12, p7291-7305. 15p.

Subjects: Computational fluid dynamics, Wafer level packaging, Turbulence, Process capability, Fluid control, Semiconductor manufacturing

Challenges and prospects for advanced packaging.

Authors: Zhiwen Chen Jiaju Zhang Shizhao Wang et al.

Source: Fundamental Research. Nov2024, Vol. 4 Issue 6, p1455-1458. 4p.

A high-efficiency transformer-in-package isolated DC-DC converter using glass-based fan-out wafer-level packaging.

Authors: Lin Cheng Zuohuan Chen Daquan Yu et al.

Source: Fundamental Research. Nov2024, Vol. 4 Issue 6, p1407-1414. 8p.

基于 MEMS 探卡的 WLP 晶圆芯片测试研究. (Chinese)

Authors: 伍 平 李桦林 唐小龙 et al.

Source: Piezoelectrics & Acoustooptics; Apr2026, Vol. 48 Issue 2, p350-354, 5p

Design and Architecture De!nition for Advanced 3D Fan-Out Wafer-Level Packaging.

Authors: Bhangaonkar, Karan Sankarasubramanian, Santosh

Source: Journal of Microelectronic & Electronic Packaging. 2024, Vol. 21 Issue 3, p59-66. 8p.

Subjects: Wafer level packaging, Three-dimensional imaging, Acquisition of data, Computer architecture, Thermal expansion

Advanced Electrochemical Plating Processes of Nano-Twinned Copper for Hybrid Bonding.

Authors: Jianwen Han Pingping Ye Braye, Stephan et al.

Source: Advancing Microelectronics. 2025, Vol. 52 Issue 5, p10-13. 4p.

Subjects: Wafer level packaging, Semiconductor wafer bonding, Crystal growth, Packaging equipment, Copper crystals, Electroplating

Size Effects of Au/Ni-Coated Polymer Particles on the Electrical Performance of Anisotropic Conductive Adhesive Films under Flexible Mechanical Conditions.

Authors: Fang, Yexing Wang, Taiyu Gu, Yue et al.

Source: Materials (1996-1944). Apr2024, Vol. 17 Issue 7, p1658. 17p.

Subjects: Anisotropic conductive films, Wafer level packaging, Three-dimensional integrated circuits, Adhesives, Strains & stresses (Mechanics), Flexible printed circuits, Finite element method

CHIPcon 2025.

Source: Advancing Microelectronics. 2025, Vol. 52 Issue 3, p26-36. 11p.

Subjects: Wafer level packaging, Career development, Generative artificial intelligence, Thermal interface materials, Language models, Flip chip technology, Systems on a chip, Edge computing

Exploring the Influence of Material Properties of Epoxy Molding Compound on Wafer Warpage in Fan-Out Wafer-Level Packaging.

Authors: Chuang, Wan-Chun Huang, Yi Chen, Po-En

Source: Materials (1996-1944). May2023, Vol. 16 Issue 9, p3482. 15p.

Subjects: Epoxy compounds, Wafer level packaging, Glass transition temperature, Young's modulus, Extreme value theory, Epoxy resins

The 25th European Microelectronics & Packaging Conference (EMPC 2025): 16 - 18 September 2025: World Trade Center, Grenoble | France.

Source: Advancing Microelectronics. 2025, Vol. 52 Issue 2, p23-37. 15p.

Subjects: Career development, Wafer level packaging, Thermal interface materials, Event management, Electronic packaging, Flip chip technology, Corporate websites, Server farms (Computer network management)

Prevention of Cu Electrolytic Migration Defects on RDL by a Cu-Selective Passivation to Enhance Reliability.

Authors: Salunke, Ashish S. Alptekin, John Akula, Kaushik et al.

Source: Journal of Microelectronic & Electronic Packaging. 2023, Vol. 20 Issue 1, p17-26. 10p.

Subjects: Copper ions, Wafer level packaging, Electrodes, Electrochemical analysis, Dendritic crystals

Investigation of Various Commonly Associated Imperfections in Radiofrequency Micro-Electro-Mechanical System Devices and its Empirical Modeling.

Authors: Karmakar, A. Biswas, B. Chauhan, A.K.

Source: IETE Journal of Research; Apr2023, Vol. 69 Issue 4, p1995-2004, 10p

Research on Defect Inspection Technology for Bump Height in Wafer-Level Packaging Based on the Triangulation Method.

Authors: Meng, Fanchang Zhang, Zili Kang, Yanhui et al.

Source: Applied Sciences (2076-3417); Feb2023, Vol. 13 Issue 3, p1997, 10p