APA (7th ed.) Citation

Chen, C. H. (2002). Timing Analysis and Optimization for DSM IC--Guest Editorial. VLSI Design, 15(3), 555. https://doi.org/10.1080/1065514021000012174

Chicago Style (17th ed.) Citation

Chen, Chien-In Henry. "Timing Analysis and Optimization for DSM IC--Guest Editorial." VLSI Design 15, no. 3 (2002): 555. https://doi.org/10.1080/1065514021000012174.

MLA (9th ed.) Citation

Chen, Chien-In Henry. "Timing Analysis and Optimization for DSM IC--Guest Editorial." VLSI Design, vol. 15, no. 3, 2002, p. 555, https://doi.org/10.1080/1065514021000012174.