APA (7th ed.) Citation

Nedjah, N., Macedo Mourelle, L., & Wang, C. (2016). A Parallel Yet Pipelined Architecture for Efficient Implementation of the Advanced Encryption Standard Algorithm on Reconfigurable Hardware. International Journal of Parallel Programming, 44(6), 1102. https://doi.org/10.1007/s10766-016-0408-7

Chicago Style (17th ed.) Citation

Nedjah, Nadia, Luiza Macedo Mourelle, and Chao Wang. "A Parallel Yet Pipelined Architecture for Efficient Implementation of the Advanced Encryption Standard Algorithm on Reconfigurable Hardware." International Journal of Parallel Programming 44, no. 6 (2016): 1102. https://doi.org/10.1007/s10766-016-0408-7.

MLA (9th ed.) Citation

Nedjah, Nadia, et al. "A Parallel Yet Pipelined Architecture for Efficient Implementation of the Advanced Encryption Standard Algorithm on Reconfigurable Hardware." International Journal of Parallel Programming, vol. 44, no. 6, 2016, p. 1102, https://doi.org/10.1007/s10766-016-0408-7.