APA (7th ed.) Citation

Aranda, L. A., Reviriego, P., & Maestro, J. A. (2018). A Comparison of Dual Modular Redundancy and Concurrent Error Detection in Finite Impulse Response Filters Implemented in SRAM-Based FPGAs Through Fault Injection. IEEE Transactions on Circuits & Systems. Part II: Express Briefs, 65(3), 376. https://doi.org/10.1109/TCSII.2017.2717490

Chicago Style (17th ed.) Citation

Aranda, Luis Alberto, Pedro Reviriego, and Juan Antonio Maestro. "A Comparison of Dual Modular Redundancy and Concurrent Error Detection in Finite Impulse Response Filters Implemented in SRAM-Based FPGAs Through Fault Injection." IEEE Transactions on Circuits & Systems. Part II: Express Briefs 65, no. 3 (2018): 376. https://doi.org/10.1109/TCSII.2017.2717490.

MLA (9th ed.) Citation

Aranda, Luis Alberto, et al. "A Comparison of Dual Modular Redundancy and Concurrent Error Detection in Finite Impulse Response Filters Implemented in SRAM-Based FPGAs Through Fault Injection." IEEE Transactions on Circuits & Systems. Part II: Express Briefs, vol. 65, no. 3, 2018, p. 376, https://doi.org/10.1109/TCSII.2017.2717490.