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Hardware implementation of fault tolerance NoC core mapping.

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Title: Hardware implementation of fault tolerance NoC core mapping.
Authors: Beechu, Naresh Kumar Reddy1, naresh.kumar@nitgoa.ac.in, Moodabettu Harishchandra, Vasantha1, Yernad Balachandra, Nithin Kumar1
Source: Telecommunication Systems; Aug2018, Vol. 68 Issue 4, p621-630, 10p
Database: Applied Science & Technology Source
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Header DbId: aci
DbLabel: Applied Science & Technology Source
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PubType: Academic Journal
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      – Type: doi
        Value: 10.1007/s11235-017-0412-2
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      – Code: eng
        Text: English
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        PageCount: 10
        StartPage: 621
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      – TitleFull: Hardware implementation of fault tolerance NoC core mapping.
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            NameFull: Beechu, Naresh Kumar Reddy
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            NameFull: Moodabettu Harishchandra, Vasantha
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            NameFull: Yernad Balachandra, Nithin Kumar
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              Text: Aug2018
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              Y: 2018
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              Value: 68
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