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A Framework for Ultra Low-Power Hardware Accelerators Using NNs for Embedded Time Series Classification.

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Title: A Framework for Ultra Low-Power Hardware Accelerators Using NNs for Embedded Time Series Classification.
Authors: Reiser, Daniel1, daniel.g.reiser@fau.dedietmar.fey@fau.de, Reichel, Peter2, peter.reichel@eas.iis.fraunhofer.de, Pechmann, Stefan3, stefan.pechmann@tum.de, Mallah, Maen4, maen.mallah@iis.fraunhofer.de, Oppelt, Maximilian4, maximilian.oppelt@iis.fraunhofer.de, Hagelauer, Amelie3,5, amelie.hagelauer@emft.fraunhofer.de, Breiling, Marco4, marco.breiling@iis.fraunhofer.de, Fey, Dietmar1, Reichenbach, Marc6, marc.reichenbach@b-tu.de
Source: Journal of Low Power Electronics & Applications; Mar2022, Vol. 12 Issue 1, p2-N.PAG, 26p
Database: Applied Science & Technology Source
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        Value: 10.3390/jlpea12010002
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        Text: English
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              Text: Mar2022
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              Y: 2022
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