A Framework for Ultra Low-Power Hardware Accelerators Using NNs for Embedded Time Series Classification.
Saved in:
| Title: | A Framework for Ultra Low-Power Hardware Accelerators Using NNs for Embedded Time Series Classification. |
|---|---|
| Authors: | Reiser, Daniel1, daniel.g.reiser@fau.dedietmar.fey@fau.de, Reichel, Peter2, peter.reichel@eas.iis.fraunhofer.de, Pechmann, Stefan3, stefan.pechmann@tum.de, Mallah, Maen4, maen.mallah@iis.fraunhofer.de, Oppelt, Maximilian4, maximilian.oppelt@iis.fraunhofer.de, Hagelauer, Amelie3,5, amelie.hagelauer@emft.fraunhofer.de, Breiling, Marco4, marco.breiling@iis.fraunhofer.de, Fey, Dietmar1, Reichenbach, Marc6, marc.reichenbach@b-tu.de |
| Source: | Journal of Low Power Electronics & Applications; Mar2022, Vol. 12 Issue 1, p2-N.PAG, 26p |
| Database: | Applied Science & Technology Source |
|
Full text is not displayed to guests.
Login for full access.
|
|
Be the first to leave a comment!
