SiC‐based analytical model for gate‐stack dual metal nanowire FET with enhanced analog performance.
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| Title: | SiC‐based analytical model for gate‐stack dual metal nanowire FET with enhanced analog performance. |
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| Authors: | Neeraj1, Goel, Anubha2, Sharma, Shobha1, Rewari, Sonam3, rewarisonam@gmail.com, Gupta, Radhey Shyam2 |
| Source: | International Journal of Numerical Modelling; Jul2022, Vol. 35 Issue 4, p1-15, 15p |
| Database: | Applied Science & Technology Source |
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| ISSN: | 08943370 |
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| DOI: | 10.1002/jnm.2986 |
