A high-level simulator for Network-on-Chip.
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| Title: | A high-level simulator for Network-on-Chip. |
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| Authors: | Paris, Paulo Cesar Donizeti1, Pedrino, Emerson Carlos1, emerson@ufscar.br |
| Source: | Integrated Computer-Aided Engineering; 2025, Vol. 32 Issue 1, p55-71, 17p |
| Database: | Applied Science & Technology Source |
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