Minimization of Leakage Current Control in CMOS Adder Circuits Using Parametric Variations.
Saved in:
| Title: | Minimization of Leakage Current Control in CMOS Adder Circuits Using Parametric Variations. |
|---|---|
| Authors: | BASHA, M. MAHABOOB1, GUNDALA, SRINIVASULU2, BUSI, RAMBABU2, rams1315@gmail.com |
| Source: | Journal of Active & Passive Electronic Devices; 2024, Vol. 18 Issue 2, p105-118, 14p |
| Database: | Applied Science & Technology Source |
| ISSN: | 15550281 |
|---|
