Design and Optimization of Double‐Tail Dynamic Latch CMOS Comparator With Modified Widlar Current Source.
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| Title: | Design and Optimization of Double‐Tail Dynamic Latch CMOS Comparator With Modified Widlar Current Source. |
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| Authors: | Singh, Tejender1,2, Tripathi, Suman Lata1,2, suman.21067@lpu.co.in, Bianchi, Domenico |
| Source: | Journal of Electrical & Computer Engineering; 12/19/2024, Vol. 2024, p1-15, 15p |
| Database: | Applied Science & Technology Source |
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