ZHANG, Y., & OKADA, K. (2024). Design of Synthesizable Digital Phase Locked Loops. IPSJ Transactions on System LSI Design Methodology, 17(1), 44. https://doi.org/10.2197/ipsjtsldm.17.44
Chicago Style (17th ed.) CitationZHANG, YUNCHENG, and KENICHI OKADA. "Design of Synthesizable Digital Phase Locked Loops." IPSJ Transactions on System LSI Design Methodology 17, no. 1 (2024): 44. https://doi.org/10.2197/ipsjtsldm.17.44.
MLA (9th ed.) CitationZHANG, YUNCHENG, and KENICHI OKADA. "Design of Synthesizable Digital Phase Locked Loops." IPSJ Transactions on System LSI Design Methodology, vol. 17, no. 1, 2024, p. 44, https://doi.org/10.2197/ipsjtsldm.17.44.
Warning: These citations may not always be 100% accurate.