P‐1.28: GOA‐AI:Designing the Size of Gate Driver on Array Circuits Using NSGA‐III(II) multi‐objective optimization algorithm framework Combined with Bayesian Optimization. - Chen, Yanling; Hu, Zhenbang; Zhou, Xiaoliang; Sun, Zhixin; Tan, Zhiwei; Liu, Yangxing (SID Symposium Digest of Technical Papers, 2025)