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Technology/System Co-Optimization for FPGA Using Emerging Reconfigurable Logic Device.

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Title: Technology/System Co-Optimization for FPGA Using Emerging Reconfigurable Logic Device.
Authors: Lu, Sheng1, sxl2408@mavs.uta.edu, Shang, Liuting1, liuting.shang@mavs.uta.edu, Jung, Sungyong2, Sungyong.Jung@sdstate.edu, Zhang, Yichen1, yichen.zhang@uta.edu, Liang, Qilian1, liang@uta.edu, Pan, Chenyun1, chenyun.pan@uta.edu
Source: ACM Journal on Emerging Technologies in Computing Systems; Jul2025, Vol. 21 Issue 3, p1-21, 21p
Database: Applied Science & Technology Source
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DbLabel: Applied Science & Technology Source
An: 188102393
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PubType: Academic Journal
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  Data: Technology/System Co-Optimization for FPGA Using Emerging Reconfigurable Logic Device.
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  Data: <searchLink fieldCode="AU" term="%22Lu%2C+Sheng%22">Lu, Sheng</searchLink><relatesTo>1</relatesTo>, <i>sxl2408@mavs.uta.edu</i><br /><searchLink fieldCode="AU" term="%22Shang%2C+Liuting%22">Shang, Liuting</searchLink><relatesTo>1</relatesTo>, <i>liuting.shang@mavs.uta.edu</i><br /><searchLink fieldCode="AU" term="%22Jung%2C+Sungyong%22">Jung, Sungyong</searchLink><relatesTo>2</relatesTo>, <i>Sungyong.Jung@sdstate.edu</i><br /><searchLink fieldCode="AU" term="%22Zhang%2C+Yichen%22">Zhang, Yichen</searchLink><relatesTo>1</relatesTo>, <i>yichen.zhang@uta.edu</i><br /><searchLink fieldCode="AU" term="%22Liang%2C+Qilian%22">Liang, Qilian</searchLink><relatesTo>1</relatesTo>, <i>liang@uta.edu</i><br /><searchLink fieldCode="AU" term="%22Pan%2C+Chenyun%22">Pan, Chenyun</searchLink><relatesTo>1</relatesTo>, <i>chenyun.pan@uta.edu</i>
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PLink https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=188102393
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        Value: 10.1145/3750730
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        Text: English
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      – TitleFull: Technology/System Co-Optimization for FPGA Using Emerging Reconfigurable Logic Device.
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            NameFull: Lu, Sheng
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            NameFull: Shang, Liuting
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              M: 07
              Text: Jul2025
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              Y: 2025
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