Efficient Design and Implementation of 21T Ternary Full Adder Based on Capacitive Threshold Logic and CNTFETs. - PRAKASH, V. N. V. SATYA; KUMAR, B. UDAY; SREE, S. SOWMYA; SUNEEL, E.; CHARAN, C. SAI; RAMASWAMY T. (Journal of Active & Passive Electronic Devices, 2025)