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High Clarity, Low Power: Achieving a 43× Speed Boost in Image Defogging Using FPGA Acceleration.

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Title: High Clarity, Low Power: Achieving a 43× Speed Boost in Image Defogging Using FPGA Acceleration.
Authors: Pham, Van Khoa1, khoapv@hcmute.edu.vn, Le, Trung Tin1, 2390707@student.hcmute.edu.vn
Source: Engineering, Technology & Applied Science Research; Oct2025, Vol. 15 Issue 5, p26376-26382, 7p
Database: Applied Science & Technology Source
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        Value: 10.48084/etasr.11931
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      – Code: eng
        Text: English
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        PageCount: 7
        StartPage: 26376
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      – TitleFull: High Clarity, Low Power: Achieving a 43× Speed Boost in Image Defogging Using FPGA Acceleration.
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              Text: Oct2025
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              Y: 2025
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