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Towards Memory-Efficient and High-Performance Branch Prediction: The LXOR Architecture for Control Flow Optimization in Embedded and General-Purpose RISC-V Processors.

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Title: Towards Memory-Efficient and High-Performance Branch Prediction: The LXOR Architecture for Control Flow Optimization in Embedded and General-Purpose RISC-V Processors.
Authors: Sutar, Devendra G.1, ds@gec.ac.in, Guinde, Nitesh B.1
Source: Journal of Low Power Electronics & Applications; Dec2025, Vol. 15 Issue 4, p64, 34p
Database: Applied Science & Technology Source
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        Value: 10.3390/jlpea15040064
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        Text: English
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        PageCount: 34
        StartPage: 64
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      – TitleFull: Towards Memory-Efficient and High-Performance Branch Prediction: The LXOR Architecture for Control Flow Optimization in Embedded and General-Purpose RISC-V Processors.
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              M: 12
              Text: Dec2025
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              Y: 2025
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