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Design the Power Evaluation of a Highly Efficient Low-Complex Adder Implementation Using Inequality Gate by Quantum-Dot Cellular Automata.

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Title: Design the Power Evaluation of a Highly Efficient Low-Complex Adder Implementation Using Inequality Gate by Quantum-Dot Cellular Automata.
Authors: Anjaiah Talamala1, anjibabu317@gmail.com, Patro, Ajit Kumar1, Pinninti, Kishore2
Source: Russian Microelectronics; Dec2025, Vol. 54 Issue 6, p681-689, 9p
Database: Applied Science & Technology Source
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Header DbId: aci
DbLabel: Applied Science & Technology Source
An: 190856753
AccessLevel: 2
PubType: Academic Journal
PubTypeId: academicJournal
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  Data: Design the Power Evaluation of a Highly Efficient Low-Complex Adder Implementation Using Inequality Gate by Quantum-Dot Cellular Automata.
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  Data: <searchLink fieldCode="AU" term="%22Anjaiah+Talamala%22">Anjaiah Talamala</searchLink><relatesTo>1</relatesTo>, <i>anjibabu317@gmail.com</i><br /><searchLink fieldCode="AU" term="%22Patro%2C+Ajit+Kumar%22">Patro, Ajit Kumar</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AU" term="%22Pinninti%2C+Kishore%22">Pinninti, Kishore</searchLink><relatesTo>2</relatesTo>
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  Data: <searchLink fieldCode="JN" term="%22Russian+Microelectronics%22">Russian Microelectronics</searchLink>; Dec2025, Vol. 54 Issue 6, p681-689, 9p
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        Value: 10.1134/S1063739725600736
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      – Code: eng
        Text: English
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        PageCount: 9
        StartPage: 681
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      – TitleFull: Design the Power Evaluation of a Highly Efficient Low-Complex Adder Implementation Using Inequality Gate by Quantum-Dot Cellular Automata.
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            NameFull: Anjaiah Talamala
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            NameFull: Patro, Ajit Kumar
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            – D: 01
              M: 12
              Text: Dec2025
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              Y: 2025
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