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A Grid‐Tied Voltage Boosting Multilevel Inverter With Reduced Voltage Stress and Part Count.

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Title: A Grid‐Tied Voltage Boosting Multilevel Inverter With Reduced Voltage Stress and Part Count.
Authors: Jena, Kasinath1, kasi.jena@gmail.com, Panigrahi, Chinmoy Kumar2, Gupta, Krishna Kumar3, Kumar, Dhananjay4, Dewangan, Niraj Kumar5
Source: International Journal of Circuit Theory & Applications; Feb2026, Vol. 54 Issue 2, p981-994, 14p
Database: Applied Science & Technology Source
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  Availability: 0
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DbLabel: Applied Science & Technology Source
An: 191428824
AccessLevel: 2
PubType: Academic Journal
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  Data: <searchLink fieldCode="JN" term="%22International+Journal+of+Circuit+Theory+%26+Applications%22">International Journal of Circuit Theory & Applications</searchLink>; Feb2026, Vol. 54 Issue 2, p981-994, 14p
PLink https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=191428824
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        Value: 10.1002/cta.4596
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      – Code: eng
        Text: English
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      – TitleFull: A Grid‐Tied Voltage Boosting Multilevel Inverter With Reduced Voltage Stress and Part Count.
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            NameFull: Jena, Kasinath
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            NameFull: Panigrahi, Chinmoy Kumar
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            NameFull: Kumar, Dhananjay
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              M: 02
              Text: Feb2026
              Type: published
              Y: 2026
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