Design Space Exploration on Blind Equalization Algorithms: Numerical Representation Analysis for SoC-FPGA.
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| Title: | Design Space Exploration on Blind Equalization Algorithms: Numerical Representation Analysis for SoC-FPGA. |
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| Authors: | Marquez-Viloria, David1, Morantes-Guzman, L. J.1,2, Guerrero-Gonzalez, Neil2,3, Marinov, Marin B.1,3 |
| Source: | Applied Sciences (2076-3417); Mar2026, Vol. 16 Issue 6, p2777, 18p |
| Database: | Applied Science & Technology Source |
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| FullText | Links: – Type: pdflink Text: Availability: 1 |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.3390/app16062777 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 18 StartPage: 2777 Titles: – TitleFull: Design Space Exploration on Blind Equalization Algorithms: Numerical Representation Analysis for SoC-FPGA. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Marquez-Viloria, David – PersonEntity: Name: NameFull: Morantes-Guzman, L. J. – PersonEntity: Name: NameFull: Guerrero-Gonzalez, Neil – PersonEntity: Name: NameFull: Marinov, Marin B. IsPartOfRelationships: – BibEntity: Dates: – D: 15 M: 03 Text: Mar2026 Type: published Y: 2026 Identifiers: – Type: issn-print Value: 20763417 Numbering: – Type: volume Value: 16 – Type: issue Value: 6 Titles: – TitleFull: Applied Sciences (2076-3417) Type: main |
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