Principle and Verification of D-Latch Circuit Using Photoelectric-Motivated Memristor for Shift Register Design.
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| Title: | Principle and Verification of D-Latch Circuit Using Photoelectric-Motivated Memristor for Shift Register Design. |
|---|---|
| Authors: | Bo, Han1, 1421451284@qq.com, Kuang, Jingchuan1, 1476111977@qq.com, Xia, Haihui1, 2769558843@qq.com, Wang, Junna1, 208638821@qq.com, Cao, Zhixiang1, 494044109@qq.com, Jin, Xiangliang1, jinxl@hunnu.edu.cn |
| Source: | Journal of Circuits, Systems & Computers; 7/15/2026, Vol. 35 Issue 11, p1-14, 14p |
| Database: | Applied Science & Technology Source |
| FullText | Text: Availability: 0 |
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| Header | DbId: aci DbLabel: Applied Science & Technology Source An: 193837338 AccessLevel: 2 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: Principle and Verification of D-Latch Circuit Using Photoelectric-Motivated Memristor for Shift Register Design. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AU" term="%22Bo%2C+Han%22">Bo, Han</searchLink><relatesTo>1</relatesTo>, <i>1421451284@qq.com</i><br /><searchLink fieldCode="AU" term="%22Kuang%2C+Jingchuan%22">Kuang, Jingchuan</searchLink><relatesTo>1</relatesTo>, <i>1476111977@qq.com</i><br /><searchLink fieldCode="AU" term="%22Xia%2C+Haihui%22">Xia, Haihui</searchLink><relatesTo>1</relatesTo>, <i>2769558843@qq.com</i><br /><searchLink fieldCode="AU" term="%22Wang%2C+Junna%22">Wang, Junna</searchLink><relatesTo>1</relatesTo>, <i>208638821@qq.com</i><br /><searchLink fieldCode="AU" term="%22Cao%2C+Zhixiang%22">Cao, Zhixiang</searchLink><relatesTo>1</relatesTo>, <i>494044109@qq.com</i><br /><searchLink fieldCode="AU" term="%22Jin%2C+Xiangliang%22">Jin, Xiangliang</searchLink><relatesTo>1</relatesTo>, <i>jinxl@hunnu.edu.cn</i> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22Journal+of+Circuits%2C+Systems+%26+Computers%22">Journal of Circuits, Systems & Computers</searchLink>; 7/15/2026, Vol. 35 Issue 11, p1-14, 14p |
| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=193837338 |
| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1142/S0218126626500465 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 14 StartPage: 1 Titles: – TitleFull: Principle and Verification of D-Latch Circuit Using Photoelectric-Motivated Memristor for Shift Register Design. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Bo, Han – PersonEntity: Name: NameFull: Kuang, Jingchuan – PersonEntity: Name: NameFull: Xia, Haihui – PersonEntity: Name: NameFull: Wang, Junna – PersonEntity: Name: NameFull: Cao, Zhixiang – PersonEntity: Name: NameFull: Jin, Xiangliang IsPartOfRelationships: – BibEntity: Dates: – D: 15 M: 07 Text: 7/15/2026 Type: published Y: 2026 Identifiers: – Type: issn-print Value: 02181266 Numbering: – Type: volume Value: 35 – Type: issue Value: 11 Titles: – TitleFull: Journal of Circuits, Systems & Computers Type: main |
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