The Spike Processing Unit (SPU): An IIR Filter Approach to Hardware-Efficient Spiking Neurons.
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| Title: | The Spike Processing Unit (SPU): An IIR Filter Approach to Hardware-Efficient Spiking Neurons. |
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| Authors: | de Araújo, Hugo Puertas1 |
| Source: | Chips; Jun2026, Vol. 5 Issue 2, p11, 25p |
| Database: | Applied Science & Technology Source |
| FullText | Text: Availability: 0 |
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| Header | DbId: aci DbLabel: Applied Science & Technology Source An: 194941142 AccessLevel: 2 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=194941142 |
| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.3390/chips5020011 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 25 StartPage: 11 Titles: – TitleFull: The Spike Processing Unit (SPU): An IIR Filter Approach to Hardware-Efficient Spiking Neurons. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: de Araújo, Hugo Puertas IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 06 Text: Jun2026 Type: published Y: 2026 Identifiers: – Type: issn-print Value: 26740729 Numbering: – Type: volume Value: 5 – Type: issue Value: 2 Titles: – TitleFull: Chips Type: main |
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