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A Generalized Network Flow Based Algorithm for Power-Aware FPGA Memory Mapping.

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Title: A Generalized Network Flow Based Algorithm for Power-Aware FPGA Memory Mapping.
Authors: Tien-Yuan Hsu1, shiu2323@gmail.com, Ting-Chi Wang1, tcwang@cs.nthu.edu.tw
Source: DAC: Annual ACM/IEEE Design Automation Conference; 2008, p30-33, 4p, 3 Diagrams, 1 Chart
Database: Applied Science & Technology Source
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DbLabel: Applied Science & Technology Source
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PubType: Conference
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  Data: A Generalized Network Flow Based Algorithm for Power-Aware FPGA Memory Mapping.
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  Data: <searchLink fieldCode="AU" term="%22Tien-Yuan+Hsu%22">Tien-Yuan Hsu</searchLink><relatesTo>1</relatesTo>, <i>shiu2323@gmail.com</i><br /><searchLink fieldCode="AU" term="%22Ting-Chi+Wang%22">Ting-Chi Wang</searchLink><relatesTo>1</relatesTo>, <i>tcwang@cs.nthu.edu.tw</i>
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PLink https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=36631542
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      – Code: eng
        Text: English
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        PageCount: 4
        StartPage: 30
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      – TitleFull: A Generalized Network Flow Based Algorithm for Power-Aware FPGA Memory Mapping.
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            NameFull: Tien-Yuan Hsu
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            NameFull: Ting-Chi Wang
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            – D: 01
              M: 02
              Text: 2008
              Type: published
              Y: 2008
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              Value: 0738100X
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            – TitleFull: DAC: Annual ACM/IEEE Design Automation Conference
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