Eguro, K., & Hauck, S. (2008). Enhancing Timing-Driven FPGA Placement for Pipelined Netlists. DAC: Annual ACM/IEEE Design Automation Conference, 34.
Chicago Style (17th ed.) CitationEguro, Ken, and Scott Hauck. "Enhancing Timing-Driven FPGA Placement for Pipelined Netlists." DAC: Annual ACM/IEEE Design Automation Conference 2008: 34.
MLA (9th ed.) CitationEguro, Ken, and Scott Hauck. "Enhancing Timing-Driven FPGA Placement for Pipelined Netlists." DAC: Annual ACM/IEEE Design Automation Conference, 2008, p. 34.
Warning: These citations may not always be 100% accurate.