APA (7th ed.) Citation

Mukherjee, J., & Raha, S. (2009). POWER-AWARE SPEED-UP FOR MULTITHREADED NUMERICAL LINEAR ALGEBRAIC SOLVERS ON CHIP MULTICORE PROCESSORS. Scalable Computing: Practice & Experience, 10(2), 217.

Chicago Style (17th ed.) Citation

Mukherjee, Jayanta, and Soumyendu Raha. "POWER-AWARE SPEED-UP FOR MULTITHREADED NUMERICAL LINEAR ALGEBRAIC SOLVERS ON CHIP MULTICORE PROCESSORS." Scalable Computing: Practice & Experience 10, no. 2 (2009): 217.

MLA (9th ed.) Citation

Mukherjee, Jayanta, and Soumyendu Raha. "POWER-AWARE SPEED-UP FOR MULTITHREADED NUMERICAL LINEAR ALGEBRAIC SOLVERS ON CHIP MULTICORE PROCESSORS." Scalable Computing: Practice & Experience, vol. 10, no. 2, 2009, p. 217.