APA (7th ed.) Citation

Nicolici, N., Al-Hashimi, B. M., & Williams, A. C. (2000). Minimisation of power dissipation during test application in full-scan sequential circuits using primary input freezing. IEE Proceedings -- Computers & Digital Techniques, 147(5), 313. https://doi.org/10.1049/ip-cdt:20000537

Chicago Style (17th ed.) Citation

Nicolici, N., B. M. Al-Hashimi, and A. C. Williams. "Minimisation of Power Dissipation During Test Application in Full-scan Sequential Circuits Using Primary Input Freezing." IEE Proceedings -- Computers & Digital Techniques 147, no. 5 (2000): 313. https://doi.org/10.1049/ip-cdt:20000537.

MLA (9th ed.) Citation

Nicolici, N., et al. "Minimisation of Power Dissipation During Test Application in Full-scan Sequential Circuits Using Primary Input Freezing." IEE Proceedings -- Computers & Digital Techniques, vol. 147, no. 5, 2000, p. 313, https://doi.org/10.1049/ip-cdt:20000537.