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Linearization of the Timing Analysis and Optimization of Level-Sensitive Digital Synchronous Circuits.

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Title: Linearization of the Timing Analysis and Optimization of Level-Sensitive Digital Synchronous Circuits.
Authors: Taskin, Baris, Kourtev, Ivan S.
Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems; January 2004, Vol. 12 Issue 1, p12-27, 16p
Database: Applied Science & Technology Source
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DbLabel: Applied Science & Technology Source
An: 500939236
AccessLevel: 2
PubType: Academic Journal
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        Value: 10.1109/TVLSI.2003.820525
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        Text: English
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        PageCount: 16
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              Text: January 2004
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