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Improving Line-Based QCA Memory Cell Design Through Dual Phase Clocking.

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Bibliographic Details
Title: Improving Line-Based QCA Memory Cell Design Through Dual Phase Clocking.
Authors: Taskin, Baris, Hong, Bo
Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems; December 2008, Vol. 16 Issue 12, p1648-1656, 9p
Database: Applied Science & Technology Source
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Header DbId: aci
DbLabel: Applied Science & Technology Source
An: 501356472
AccessLevel: 2
PubType: Academic Journal
PubTypeId: academicJournal
PreciseRelevancyScore: 0
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RecordInfo BibRecord:
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      – Type: doi
        Value: 10.1109/TVLSI.2008.2003171
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      – Code: eng
        Text: English
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        PageCount: 9
        StartPage: 1648
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      – TitleFull: Improving Line-Based QCA Memory Cell Design Through Dual Phase Clocking.
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            NameFull: Taskin, Baris
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              Text: December 2008
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              Y: 2008
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              Value: 12
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