APA (7th ed.) Citation

Banerjee, A., Wolkotte, P. T., & Mullins, R. D. (2009). An Energy and Performance Exploration of Network-on-Chip Architectures. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 17(3), 319. https://doi.org/10.1109/TVLSI.2008.2011232

Chicago Style (17th ed.) Citation

Banerjee, Arnab, Pascal T. Wolkotte, and Robert D. Mullins. "An Energy and Performance Exploration of Network-on-Chip Architectures." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17, no. 3 (2009): 319. https://doi.org/10.1109/TVLSI.2008.2011232.

MLA (9th ed.) Citation

Banerjee, Arnab, et al. "An Energy and Performance Exploration of Network-on-Chip Architectures." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 17, no. 3, 2009, p. 319, https://doi.org/10.1109/TVLSI.2008.2011232.