APA (7th ed.) Citation

Apolloni, R., Chaver, D., & Rodriguez, F. C. (2011). Hybrid timing-address oriented load-store queue filtering for an x86 architecture. IET Computers & Digital Techniques, 5(2), 145. https://doi.org/10.1049/iet-cdt.2010.0004

Chicago Style (17th ed.) Citation

Apolloni, R., D. Chaver, and F. C. Rodriguez. "Hybrid Timing-address Oriented Load-store Queue Filtering for an X86 Architecture." IET Computers & Digital Techniques 5, no. 2 (2011): 145. https://doi.org/10.1049/iet-cdt.2010.0004.

MLA (9th ed.) Citation

Apolloni, R., et al. "Hybrid Timing-address Oriented Load-store Queue Filtering for an X86 Architecture." IET Computers & Digital Techniques, vol. 5, no. 2, 2011, p. 145, https://doi.org/10.1049/iet-cdt.2010.0004.