CACTI-FinFET: An Integrated Delay and Power Modeling Framework for FinFET-based Caches Under Process Variations.
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| Title: | CACTI-FinFET: An Integrated Delay and Power Modeling Framework for FinFET-based Caches Under Process Variations. |
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| Authors: | Chun-Yi Lee1, Jha, Niraj K.1 |
| Source: | DAC: Annual ACM/IEEE Design Automation Conference; Jun2011, p866-871, 6p, 6 Diagrams, 2 Charts, 8 Graphs |
| Database: | Applied Science & Technology Source |
| FullText | Links: – Type: pdflink Text: Availability: 0 |
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| Header | DbId: aci DbLabel: Applied Science & Technology Source An: 65316367 AccessLevel: 2 PubType: Conference PubTypeId: conference PreciseRelevancyScore: 0 |
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| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=65316367 |
| RecordInfo | BibRecord: BibEntity: Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 6 StartPage: 866 Titles: – TitleFull: CACTI-FinFET: An Integrated Delay and Power Modeling Framework for FinFET-based Caches Under Process Variations. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Chun-Yi Lee – PersonEntity: Name: NameFull: Jha, Niraj K. IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 06 Text: Jun2011 Type: published Y: 2011 Identifiers: – Type: issn-print Value: 0738100X Titles: – TitleFull: DAC: Annual ACM/IEEE Design Automation Conference Type: main |
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