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Mapping application performance to HPC architecture

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Title: Mapping application performance to HPC architecture
Authors: Gray, A.1, a.gray@epcc.ed.ac.uk, Bethune, I.1, Kenway, R.1, Smith, L.1, Guest, M.2, Kitchen, C.2, Calleja, P.3, Korzynski, A.3, Rankin, S.3, Ashworth, M.4, Porter, A.4, Todorov, I.4, Plummer, M.4, Jones, E.5, Steenman-Clark, L.6, Ralston, B.7, Laughton, C.8
Source: Computer Physics Communications; Mar2012, Vol. 183 Issue 3, p520-529, 10p
Database: Applied Science & Technology Source
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Header DbId: aci
DbLabel: Applied Science & Technology Source
An: 70261841
AccessLevel: 2
PubType: Periodical
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PreciseRelevancyScore: 0
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