APA (7th ed.) Citation

Meloni, P., Pomata, S., Tuveri, G., Secchi, S., Raffo, L., & Lindwer, M. (2012). Enabling Fast ASIP Design Space Exploration: An FPGA-Based Runtime Reconfigurable Prototyper. VLSI Design, 1. https://doi.org/10.1155/2012/580584

Chicago Style (17th ed.) Citation

Meloni, Paolo, Sebastiano Pomata, Giuseppe Tuveri, Simone Secchi, Luigi Raffo, and Menno Lindwer. "Enabling Fast ASIP Design Space Exploration: An FPGA-Based Runtime Reconfigurable Prototyper." VLSI Design 2012: 1. https://doi.org/10.1155/2012/580584.

MLA (9th ed.) Citation

Meloni, Paolo, et al. "Enabling Fast ASIP Design Space Exploration: An FPGA-Based Runtime Reconfigurable Prototyper." VLSI Design, 2012, p. 1, https://doi.org/10.1155/2012/580584.