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Enabling Fast ASIP Design Space Exploration: An FPGA-Based Runtime Reconfigurable Prototyper.

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Title: Enabling Fast ASIP Design Space Exploration: An FPGA-Based Runtime Reconfigurable Prototyper.
Authors: Meloni, Paolo1, paolo.meloni@diee.unica.it, Pomata, Sebastiano1, Tuveri, Giuseppe1, Secchi, Simone1, Raffo, Luigi1, Lindwer, Menno2
Source: VLSI Design; Jan2012, p1-16, 16p
Database: Applied Science & Technology Source
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DbLabel: Applied Science & Technology Source
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PubType: Academic Journal
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  Data: Enabling Fast ASIP Design Space Exploration: An FPGA-Based Runtime Reconfigurable Prototyper.
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        Value: 10.1155/2012/580584
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              Text: Jan2012
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