Chen, R., Chen, P., Li, K., & Liu, H. (2025). Heterogeneous Tapped Delay-Line Time-to-Digital Converter on Artix-7 FPGA. Sensors (14248220), 25(9), 2923. https://doi.org/10.3390/s25092923
Chicago Style (17th ed.) CitationChen, Riguang, Ping Chen, Kuinian Li, and Hulin Liu. "Heterogeneous Tapped Delay-Line Time-to-Digital Converter on Artix-7 FPGA." Sensors (14248220) 25, no. 9 (2025): 2923. https://doi.org/10.3390/s25092923.
MLA (9th ed.) CitationChen, Riguang, et al. "Heterogeneous Tapped Delay-Line Time-to-Digital Converter on Artix-7 FPGA." Sensors (14248220), vol. 25, no. 9, 2025, p. 2923, https://doi.org/10.3390/s25092923.
Warning: These citations may not always be 100% accurate.