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First-order SPICE modeling of SiC p- and n-channel side-gate JFETs toward high-temperature complementary JFET ICs.

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Title: First-order SPICE modeling of SiC p- and n-channel side-gate JFETs toward high-temperature complementary JFET ICs.
Authors: Maeda, Noriyuki1 (AUTHOR), Kaneko, Mitsuaki1 (AUTHOR) kaneko@semicon.kuee.kyoto-u.ac.jp, Tanaka, Hajime2 (AUTHOR), Kimoto, Tsunenobu1 (AUTHOR)
Source: APL Electronic Devices. Jun2025, Vol. 1 Issue 2, p1-10. 10p.
Database: Academic Search Ultimate
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  Data: First-order SPICE modeling of SiC p- and n-channel side-gate JFETs toward high-temperature complementary JFET ICs.
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  Data: <searchLink fieldCode="AR" term="%22Maeda%2C+Noriyuki%22">Maeda, Noriyuki</searchLink><relatesTo>1</relatesTo> (AUTHOR)<br /><searchLink fieldCode="AR" term="%22Kaneko%2C+Mitsuaki%22">Kaneko, Mitsuaki</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> kaneko@semicon.kuee.kyoto-u.ac.jp</i><br /><searchLink fieldCode="AR" term="%22Tanaka%2C+Hajime%22">Tanaka, Hajime</searchLink><relatesTo>2</relatesTo> (AUTHOR)<br /><searchLink fieldCode="AR" term="%22Kimoto%2C+Tsunenobu%22">Kimoto, Tsunenobu</searchLink><relatesTo>1</relatesTo> (AUTHOR)
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  Data: <searchLink fieldCode="JN" term="%22APL+Electronic+Devices%22">APL Electronic Devices</searchLink>. Jun2025, Vol. 1 Issue 2, p1-10. 10p.
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        Value: 10.1063/5.0254971
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        Text: English
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      – TitleFull: First-order SPICE modeling of SiC p- and n-channel side-gate JFETs toward high-temperature complementary JFET ICs.
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            NameFull: Maeda, Noriyuki
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            NameFull: Kaneko, Mitsuaki
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            NameFull: Tanaka, Hajime
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              Text: Jun2025
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              Y: 2025
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