一种面向嵌入式场景的五级流水线 RISC-V 处理器设计.
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| Title: | 一种面向嵌入式场景的五级流水线 RISC-V 处理器设计. |
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| Alternate Title: | Design of five-stage pipelined RISC-V processor for embedded scenarios. |
| Authors: | 于安宁1,2, 黄 晗1,2, 利 节1,2, 曾孝平3 |
| Source: | Application Research of Computers / Jisuanji Yingyong Yanjiu. Sep2026, Vol. 43 Issue 9, p2767-2772. 6p. |
| Database: | Academic Search Ultimate |
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