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An Input Vector Monitoring Concurrent BIST Architecture Based on a Precomputed Test Set.

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Title: An Input Vector Monitoring Concurrent BIST Architecture Based on a Precomputed Test Set.
Authors: Voyiatzis, Loannis1 uoyageri@otenet.gr, Paschalis, Antonis2, Gizopoulos, Dimitris3 dgizop@unipi.gr, Halatsis, Constantin2, Makri, Frosso S.4, Hatzimihail, Miltiadis3
Source: IEEE Transactions on Computers. Aug2008, Vol. 57 Issue 8, p1012-1022. 11p.
Database: Academic Search Ultimate
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DbLabel: Academic Search Ultimate
An: 33391341
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        Value: 10.1109/TC.2008.49
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        Text: English
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      – TitleFull: An Input Vector Monitoring Concurrent BIST Architecture Based on a Precomputed Test Set.
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              Text: Aug2008
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