APA (7th ed.) Citation

Wang, J., Shi, Y., Chen, Z., & Wen, M. (2025). SpikeFlow: A hardware–software co-designed systolic array for spiking neural networks. Journal of Systems Architecture, 169, N.PAG. https://doi.org/10.1016/j.sysarc.2025.103604

Chicago Style (17th ed.) Citation

Wang, Jianan, Yang Shi, Zhaoyun Chen, and Mei Wen. "SpikeFlow: A Hardware–software Co-designed Systolic Array for Spiking Neural Networks." Journal of Systems Architecture 169 (2025): N.PAG. https://doi.org/10.1016/j.sysarc.2025.103604.

MLA (9th ed.) Citation

Wang, Jianan, et al. "SpikeFlow: A Hardware–software Co-designed Systolic Array for Spiking Neural Networks." Journal of Systems Architecture, vol. 169, 2025, p. N.PAG, https://doi.org/10.1016/j.sysarc.2025.103604.