An Accuracy-Adjustment Fixed-Width Booth Multiplier Based on Multilevel Conditional Probability.

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Title: An Accuracy-Adjustment Fixed-Width Booth Multiplier Based on Multilevel Conditional Probability.
Authors: Chen, Yuan-Ho1
Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. Jan2015, Vol. 23 Issue 1, p203-207. 5p.
Subjects: Multiplying circuits, Digital signal processing, Conditional probability, Complementary metal oxide semiconductors, Balanced truncation
Abstract: This brief proposes an accuracy-adjustment fixed-width Booth multiplier that compensates the truncation error using a multilevel conditional probability (MLCP) estimator and derives a closed form for various bit widths $L$ and column information $w$ . Compared with the exhaustive simulations strategy, the proposed MLCP estimator substantially reduces simulation time and easily adjusts accuracy based on mathematical derivations. Unlike previous conditional-probability methods, the proposed MLCP uses entire nonzero code, namely MLCP, to estimate the truncation error and achieve higher accuracy levels. Furthermore, the simple and small MLCP compensated circuit is proposed in this brief. The results of this brief show that the proposed MLCP Booth multipliers achieve low-cost high-accuracy performance. [ABSTRACT FROM PUBLISHER]
Copyright of IEEE Transactions on Very Large Scale Integration (VLSI) Systems is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
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Items – Name: Title
  Label: Title
  Group: Ti
  Data: An Accuracy-Adjustment Fixed-Width Booth Multiplier Based on Multilevel Conditional Probability.
– Name: Author
  Label: Authors
  Group: Au
  Data: <searchLink fieldCode="AR" term="%22Chen%2C+Yuan-Ho%22">Chen, Yuan-Ho</searchLink><relatesTo>1</relatesTo>
– Name: TitleSource
  Label: Source
  Group: Src
  Data: <searchLink fieldCode="JN" term="%22IEEE+Transactions+on+Very+Large+Scale+Integration+%28VLSI%29+Systems%22">IEEE Transactions on Very Large Scale Integration (VLSI) Systems</searchLink>. Jan2015, Vol. 23 Issue 1, p203-207. 5p.
– Name: Subject
  Label: Subjects
  Group: Su
  Data: <searchLink fieldCode="DE" term="%22Multiplying+circuits%22">Multiplying circuits</searchLink><br /><searchLink fieldCode="DE" term="%22Digital+signal+processing%22">Digital signal processing</searchLink><br /><searchLink fieldCode="DE" term="%22Conditional+probability%22">Conditional probability</searchLink><br /><searchLink fieldCode="DE" term="%22Complementary+metal+oxide+semiconductors%22">Complementary metal oxide semiconductors</searchLink><br /><searchLink fieldCode="DE" term="%22Balanced+truncation%22">Balanced truncation</searchLink>
– Name: Abstract
  Label: Abstract
  Group: Ab
  Data: This brief proposes an accuracy-adjustment fixed-width Booth multiplier that compensates the truncation error using a multilevel conditional probability (MLCP) estimator and derives a closed form for various bit widths $L$ and column information $w$ . Compared with the exhaustive simulations strategy, the proposed MLCP estimator substantially reduces simulation time and easily adjusts accuracy based on mathematical derivations. Unlike previous conditional-probability methods, the proposed MLCP uses entire nonzero code, namely MLCP, to estimate the truncation error and achieve higher accuracy levels. Furthermore, the simple and small MLCP compensated circuit is proposed in this brief. The results of this brief show that the proposed MLCP Booth multipliers achieve low-cost high-accuracy performance. [ABSTRACT FROM PUBLISHER]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of IEEE Transactions on Very Large Scale Integration (VLSI) Systems is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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RecordInfo BibRecord:
  BibEntity:
    Identifiers:
      – Type: doi
        Value: 10.1109/TVLSI.2014.2302447
    Languages:
      – Code: eng
        Text: English
    PhysicalDescription:
      Pagination:
        PageCount: 5
        StartPage: 203
    Subjects:
      – SubjectFull: Multiplying circuits
        Type: general
      – SubjectFull: Digital signal processing
        Type: general
      – SubjectFull: Conditional probability
        Type: general
      – SubjectFull: Complementary metal oxide semiconductors
        Type: general
      – SubjectFull: Balanced truncation
        Type: general
    Titles:
      – TitleFull: An Accuracy-Adjustment Fixed-Width Booth Multiplier Based on Multilevel Conditional Probability.
        Type: main
  BibRelationships:
    HasContributorRelationships:
      – PersonEntity:
          Name:
            NameFull: Chen, Yuan-Ho
    IsPartOfRelationships:
      – BibEntity:
          Dates:
            – D: 01
              M: 01
              Text: Jan2015
              Type: published
              Y: 2015
          Identifiers:
            – Type: issn-print
              Value: 10638210
          Numbering:
            – Type: volume
              Value: 23
            – Type: issue
              Value: 1
          Titles:
            – TitleFull: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
              Type: main
ResultId 1