A Highly Scalable Single Poly-Silicon Embedded Electrically Erasable Programmable Read Only Memory With Tungsten Control Gate by Full CMOS Process.
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| Title: | A Highly Scalable Single Poly-Silicon Embedded Electrically Erasable Programmable Read Only Memory With Tungsten Control Gate by Full CMOS Process. |
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| Authors: | Chung, Chih-Ping1, Chang-Liao, Kuei-Shu1 |
| Source: | IEEE Electron Device Letters. Apr2015, Vol. 36 Issue 4, p336-338. 3p. |
| Subjects: | Tungsten, Erasable programmable read-only memory, Complementary metal oxide semiconductors, Metal insulator semiconductors, Integrated circuits |
| Abstract: | A highly scalable single poly-silicon multiple time programmable erasable programmable read only memory (EEPROM) with tungsten metallic control gate (W-CG) manufactured by full 0.13~\mu \textm -CMOS process is successfully demonstrated in this letter. Since the coupling ratio of conventional EEPROM cell is reduced with decreasing cell size, a smaller size in W-CG cell with a reduced spacing of CG to floating gate (FG) can obtain a higher coupling ratio and increase programming/erasing window owing to its novel lateral metal-insulator-poly coupling structure. [ABSTRACT FROM AUTHOR] |
| Copyright of IEEE Electron Device Letters is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
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| Header | DbId: egs DbLabel: Engineering Source An: 101733631 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: A Highly Scalable Single Poly-Silicon Embedded Electrically Erasable Programmable Read Only Memory With Tungsten Control Gate by Full CMOS Process. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Chung%2C+Chih-Ping%22">Chung, Chih-Ping</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Chang-Liao%2C+Kuei-Shu%22">Chang-Liao, Kuei-Shu</searchLink><relatesTo>1</relatesTo> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22IEEE+Electron+Device+Letters%22">IEEE Electron Device Letters</searchLink>. Apr2015, Vol. 36 Issue 4, p336-338. 3p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Tungsten%22">Tungsten</searchLink><br /><searchLink fieldCode="DE" term="%22Erasable+programmable+read-only+memory%22">Erasable programmable read-only memory</searchLink><br /><searchLink fieldCode="DE" term="%22Complementary+metal+oxide+semiconductors%22">Complementary metal oxide semiconductors</searchLink><br /><searchLink fieldCode="DE" term="%22Metal+insulator+semiconductors%22">Metal insulator semiconductors</searchLink><br /><searchLink fieldCode="DE" term="%22Integrated+circuits%22">Integrated circuits</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: A highly scalable single poly-silicon multiple time programmable erasable programmable read only memory (EEPROM) with tungsten metallic control gate (W-CG) manufactured by full 0.13~\mu \textm -CMOS process is successfully demonstrated in this letter. Since the coupling ratio of conventional EEPROM cell is reduced with decreasing cell size, a smaller size in W-CG cell with a reduced spacing of CG to floating gate (FG) can obtain a higher coupling ratio and increase programming/erasing window owing to its novel lateral metal-insulator-poly coupling structure. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of IEEE Electron Device Letters is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1109/LED.2015.2404854 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 3 StartPage: 336 Subjects: – SubjectFull: Tungsten Type: general – SubjectFull: Erasable programmable read-only memory Type: general – SubjectFull: Complementary metal oxide semiconductors Type: general – SubjectFull: Metal insulator semiconductors Type: general – SubjectFull: Integrated circuits Type: general Titles: – TitleFull: A Highly Scalable Single Poly-Silicon Embedded Electrically Erasable Programmable Read Only Memory With Tungsten Control Gate by Full CMOS Process. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Chung, Chih-Ping – PersonEntity: Name: NameFull: Chang-Liao, Kuei-Shu IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 04 Text: Apr2015 Type: published Y: 2015 Identifiers: – Type: issn-print Value: 07413106 Numbering: – Type: volume Value: 36 – Type: issue Value: 4 Titles: – TitleFull: IEEE Electron Device Letters Type: main |
| ResultId | 1 |
