Response Policies to Process Module Failure in Single-Arm Cluster Tools Subject to Wafer Residency Time Constraints.

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Title: Response Policies to Process Module Failure in Single-Arm Cluster Tools Subject to Wafer Residency Time Constraints.
Authors: Qiao, Yan1, Pan, Chun-Rong2, Wu, Nai-Qi3, Zhou, MengChu4
Source: IEEE Transactions on Automation Science & Engineering. Jul2015, Vol. 12 Issue 3, p1125-1139. 15p.
Subjects: Semiconductor wafers, Failure analysis, Semiconductor manufacturing, Feasibility studies, Petri nets, Steady-state responses
Abstract: In semiconductor manufacturing, wafer residency time constraints make the scheduling problem of cluster tools complicated. A process module (PM) in cluster tools is prone to failure. It is crucial to deal with any such failure in a proper and timely manner. If there are feasible periodic schedules in operating a cluster tool before and after a PM failure, it is desired to make it operate continuously when such a failure occurs. However, due to wafer residency time constraints, it is highly challenging to control a tool such that it can be correctly transferred from a feasible schedule before failure to another after it. To solve this problem, a Petri net model is developed to describe the dynamic behavior of a single-arm cluster tool and failure response policies are proposed. The proposed policies are formulated via simple control laws for their easy implementation. Examples are given to show them. [ABSTRACT FROM PUBLISHER]
Copyright of IEEE Transactions on Automation Science & Engineering is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
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  Data: Response Policies to Process Module Failure in Single-Arm Cluster Tools Subject to Wafer Residency Time Constraints.
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  Data: <searchLink fieldCode="DE" term="%22Semiconductor+wafers%22">Semiconductor wafers</searchLink><br /><searchLink fieldCode="DE" term="%22Failure+analysis%22">Failure analysis</searchLink><br /><searchLink fieldCode="DE" term="%22Semiconductor+manufacturing%22">Semiconductor manufacturing</searchLink><br /><searchLink fieldCode="DE" term="%22Feasibility+studies%22">Feasibility studies</searchLink><br /><searchLink fieldCode="DE" term="%22Petri+nets%22">Petri nets</searchLink><br /><searchLink fieldCode="DE" term="%22Steady-state+responses%22">Steady-state responses</searchLink>
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  Data: In semiconductor manufacturing, wafer residency time constraints make the scheduling problem of cluster tools complicated. A process module (PM) in cluster tools is prone to failure. It is crucial to deal with any such failure in a proper and timely manner. If there are feasible periodic schedules in operating a cluster tool before and after a PM failure, it is desired to make it operate continuously when such a failure occurs. However, due to wafer residency time constraints, it is highly challenging to control a tool such that it can be correctly transferred from a feasible schedule before failure to another after it. To solve this problem, a Petri net model is developed to describe the dynamic behavior of a single-arm cluster tool and failure response policies are proposed. The proposed policies are formulated via simple control laws for their easy implementation. Examples are given to show them. [ABSTRACT FROM PUBLISHER]
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  Data: <i>Copyright of IEEE Transactions on Automation Science & Engineering is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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        Value: 10.1109/TASE.2014.2312823
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      – SubjectFull: Semiconductor manufacturing
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              Text: Jul2015
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