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Supporting System Consistency with Differential Transactions in Flash-Based SSDs.

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Title: Supporting System Consistency with Differential Transactions in Flash-Based SSDs.
Authors: Lu, Youyou1, Shu, Jiwu1, Guo, Jia1, Zhu, Peng1
Source: IEEE Transactions on Computers. Feb2016, Vol. 65 Issue 2, p627-639. 13p.
Subjects: Embedded computer system design & construction, Flash memory, Traffic engineering, Data analysis, Metadata, Computer network protocols
Abstract: Embedded transaction design inside solid state drives (SSDs) is an attractive way to support system consistency with low overhead due to the no-overwrite property of flash memory. Recent research proposes shadow paging variants to reduce write traffic to SSDs for longer lifetime while leveraging the random performance of SSDs. However, writes in transactions usually are small, and the page-aligned shadow paging protocols still incur high write amplification, which hurts SSD lifetime. In this paper, we propose an embedded transaction protocol, DiffTx, which differentially logs partial page updates in a write-ahead logging way and writes full page updates in a shadow paging way, aiming at low write amplification. DiffTx further improves transaction performance using two techniques. First, by clustering mapping metadata of full page updates with differential data of partial page updates in a single record, DiffTx tracks pages of each transaction at low overhead. Second, DiffTx removes the write ordering on commit by delaying the completeness check of writes, leveraging the clean-state write property of flash memory. Experiments show that DiffTx improves throughput by 25.9 percent and halves write traffic on average compared to TxFlash, a typical embedded transaction protocol for flash memory. [ABSTRACT FROM AUTHOR]
Copyright of IEEE Transactions on Computers is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
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  Data: <searchLink fieldCode="DE" term="%22Embedded+computer+system+design+%26+construction%22">Embedded computer system design & construction</searchLink><br /><searchLink fieldCode="DE" term="%22Flash+memory%22">Flash memory</searchLink><br /><searchLink fieldCode="DE" term="%22Traffic+engineering%22">Traffic engineering</searchLink><br /><searchLink fieldCode="DE" term="%22Data+analysis%22">Data analysis</searchLink><br /><searchLink fieldCode="DE" term="%22Metadata%22">Metadata</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+network+protocols%22">Computer network protocols</searchLink>
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  Data: Embedded transaction design inside solid state drives (SSDs) is an attractive way to support system consistency with low overhead due to the no-overwrite property of flash memory. Recent research proposes shadow paging variants to reduce write traffic to SSDs for longer lifetime while leveraging the random performance of SSDs. However, writes in transactions usually are small, and the page-aligned shadow paging protocols still incur high write amplification, which hurts SSD lifetime. In this paper, we propose an embedded transaction protocol, DiffTx, which differentially logs partial page updates in a write-ahead logging way and writes full page updates in a shadow paging way, aiming at low write amplification. DiffTx further improves transaction performance using two techniques. First, by clustering mapping metadata of full page updates with differential data of partial page updates in a single record, DiffTx tracks pages of each transaction at low overhead. Second, DiffTx removes the write ordering on commit by delaying the completeness check of writes, leveraging the clean-state write property of flash memory. Experiments show that DiffTx improves throughput by 25.9 percent and halves write traffic on average compared to TxFlash, a typical embedded transaction protocol for flash memory. [ABSTRACT FROM AUTHOR]
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  Data: <i>Copyright of IEEE Transactions on Computers is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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        Value: 10.1109/TC.2015.2419664
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        Text: English
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      – SubjectFull: Flash memory
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      – SubjectFull: Computer network protocols
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              Text: Feb2016
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