PNS-FCR: Flexible Charge Recycling Dynamic Circuit Technique for Low-Power Microprocessors.
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| Title: | PNS-FCR: Flexible Charge Recycling Dynamic Circuit Technique for Low-Power Microprocessors. |
|---|---|
| Authors: | Wang, Jinhui1, Gong, Na1, Friedman, Eby G.2 |
| Source: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems. Feb2016, Vol. 24 Issue 2, p613-624. 12p. |
| Subjects: | Microprocessor energy consumption, Integrated circuit design, P-type semiconductors, N-type semiconductors, Computer arithmetic & logic units |
| Abstract: | Due to the superior speed and area characteristics, dynamic circuits are widely applied in data paths and other time critical components in modern microprocessors. The high switching activity of dynamic circuits, however, consumes significant power. In this paper, a p-type/n-type dynamic circuit selection (PNS) algorithm and a flexible charge recycling (FCR) design methodology are proposed to achieve high power efficiency in data paths. The effects of technology scaling, data path width, design complexity, clock skew, and environmental conditions are discussed. Simulation results show that the power consumption of an arithmetic and logic unit (ALU) with the proposed PNS-FCR can be reduced by up to 60% as compared with a conventional ALU. An 8-bit ALU test circuit has also been manufactured based on a 0.35- \mu \textm Global Foundries technology, demonstrating the power and area efficiency of the proposed methodology. [ABSTRACT FROM AUTHOR] |
| Copyright of IEEE Transactions on Very Large Scale Integration (VLSI) Systems is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
| FullText | Text: Availability: 0 |
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| Header | DbId: egs DbLabel: Engineering Source An: 112441932 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: PNS-FCR: Flexible Charge Recycling Dynamic Circuit Technique for Low-Power Microprocessors. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Wang%2C+Jinhui%22">Wang, Jinhui</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Gong%2C+Na%22">Gong, Na</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Friedman%2C+Eby+G%2E%22">Friedman, Eby G.</searchLink><relatesTo>2</relatesTo> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22IEEE+Transactions+on+Very+Large+Scale+Integration+%28VLSI%29+Systems%22">IEEE Transactions on Very Large Scale Integration (VLSI) Systems</searchLink>. Feb2016, Vol. 24 Issue 2, p613-624. 12p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Microprocessor+energy+consumption%22">Microprocessor energy consumption</searchLink><br /><searchLink fieldCode="DE" term="%22Integrated+circuit+design%22">Integrated circuit design</searchLink><br /><searchLink fieldCode="DE" term="%22P-type+semiconductors%22">P-type semiconductors</searchLink><br /><searchLink fieldCode="DE" term="%22N-type+semiconductors%22">N-type semiconductors</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+arithmetic+%26+logic+units%22">Computer arithmetic & logic units</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: Due to the superior speed and area characteristics, dynamic circuits are widely applied in data paths and other time critical components in modern microprocessors. The high switching activity of dynamic circuits, however, consumes significant power. In this paper, a p-type/n-type dynamic circuit selection (PNS) algorithm and a flexible charge recycling (FCR) design methodology are proposed to achieve high power efficiency in data paths. The effects of technology scaling, data path width, design complexity, clock skew, and environmental conditions are discussed. Simulation results show that the power consumption of an arithmetic and logic unit (ALU) with the proposed PNS-FCR can be reduced by up to 60% as compared with a conventional ALU. An 8-bit ALU test circuit has also been manufactured based on a 0.35- \mu \textm Global Foundries technology, demonstrating the power and area efficiency of the proposed methodology. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of IEEE Transactions on Very Large Scale Integration (VLSI) Systems is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1109/TVLSI.2015.2419255 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 12 StartPage: 613 Subjects: – SubjectFull: Microprocessor energy consumption Type: general – SubjectFull: Integrated circuit design Type: general – SubjectFull: P-type semiconductors Type: general – SubjectFull: N-type semiconductors Type: general – SubjectFull: Computer arithmetic & logic units Type: general Titles: – TitleFull: PNS-FCR: Flexible Charge Recycling Dynamic Circuit Technique for Low-Power Microprocessors. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Wang, Jinhui – PersonEntity: Name: NameFull: Gong, Na – PersonEntity: Name: NameFull: Friedman, Eby G. IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 02 Text: Feb2016 Type: published Y: 2016 Identifiers: – Type: issn-print Value: 10638210 Numbering: – Type: volume Value: 24 – Type: issue Value: 2 Titles: – TitleFull: IEEE Transactions on Very Large Scale Integration (VLSI) Systems Type: main |
| ResultId | 1 |
