Low-Power Multimodal Switch for Leakage Reduction and Stability Improvement in SRAM Cell.

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Title: Low-Power Multimodal Switch for Leakage Reduction and Stability Improvement in SRAM Cell.
Authors: Kavitha, M.1 kavithaengr@gmail.com, Govindaraj, T.2
Source: Arabian Journal for Science & Engineering (Springer Science & Business Media B.V. ). Aug2016, Vol. 41 Issue 8, p2945-2955. 11p.
Subjects: Static random access memory chips, Integrated memory circuits, Static random access memory
Abstract: Memory block occupies most of the integrated chip area and an improvement in memory cell performance will enhance the overall system performance. Ever increasing levels of on-chip integration of static random access memory (SRAM) increases leakage and degrades cell stability. In this paper a low-power multimodal switch (LPMS) power gating structure is proposed to minimize leakage and improve data stability in SRAM cell. The proposed design provides maximum of 91% reduction in leakage power and 23.5% reduction in dynamic power over conventional methods. Read and write margins are enhanced by 4.7 and 7.5% respectively. Proposed LPMS technique offers good leakage reduction and stability even under different operating parameter variations. [ABSTRACT FROM AUTHOR]
Copyright of Arabian Journal for Science & Engineering (Springer Science & Business Media B.V. ) is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
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  Data: Low-Power Multimodal Switch for Leakage Reduction and Stability Improvement in SRAM Cell.
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  Data: <searchLink fieldCode="DE" term="%22Static+random+access+memory+chips%22">Static random access memory chips</searchLink><br /><searchLink fieldCode="DE" term="%22Integrated+memory+circuits%22">Integrated memory circuits</searchLink><br /><searchLink fieldCode="DE" term="%22Static+random+access+memory%22">Static random access memory</searchLink>
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  Data: Memory block occupies most of the integrated chip area and an improvement in memory cell performance will enhance the overall system performance. Ever increasing levels of on-chip integration of static random access memory (SRAM) increases leakage and degrades cell stability. In this paper a low-power multimodal switch (LPMS) power gating structure is proposed to minimize leakage and improve data stability in SRAM cell. The proposed design provides maximum of 91% reduction in leakage power and 23.5% reduction in dynamic power over conventional methods. Read and write margins are enhanced by 4.7 and 7.5% respectively. Proposed LPMS technique offers good leakage reduction and stability even under different operating parameter variations. [ABSTRACT FROM AUTHOR]
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  Data: <i>Copyright of Arabian Journal for Science & Engineering (Springer Science & Business Media B.V. ) is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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        Value: 10.1007/s13369-016-2047-0
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      – Code: eng
        Text: English
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        StartPage: 2945
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      – SubjectFull: Integrated memory circuits
        Type: general
      – SubjectFull: Static random access memory
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      – TitleFull: Low-Power Multimodal Switch for Leakage Reduction and Stability Improvement in SRAM Cell.
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              Text: Aug2016
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