Zhang, W., Yu, S., Wang, H., Dai, Z., & Chen, H. (2016). Hardware Support for Concurrent Detection of Multiple Concurrency Bugs on Fused CPU-GPU Architectures. IEEE Transactions on Computers, 65(10), 3083. https://doi.org/10.1109/TC.2015.2512860
Chicago Style (17th ed.) CitationZhang, Weihua, Shiqiang Yu, Haojun Wang, Zhuofang Dai, and Haibo Chen. "Hardware Support for Concurrent Detection of Multiple Concurrency Bugs on Fused CPU-GPU Architectures." IEEE Transactions on Computers 65, no. 10 (2016): 3083. https://doi.org/10.1109/TC.2015.2512860.
MLA (9th ed.) CitationZhang, Weihua, et al. "Hardware Support for Concurrent Detection of Multiple Concurrency Bugs on Fused CPU-GPU Architectures." IEEE Transactions on Computers, vol. 65, no. 10, 2016, p. 3083, https://doi.org/10.1109/TC.2015.2512860.